The field of the disclosure relates generally to printed circuit boards, and more particularly, to printed circuit boards including thick-wall conductive vias and methods of manufacturing the same.
Power electronics systems generally include a printed circuit board and a plurality of electronic components mounted to the printed circuit board. Printed circuit boards generally include a plurality of conductive traces formed from a conductive layer to provide an electrical connection between the electronic components. Some printed circuit boards have multiple conductive layers, including inner conductive layers and outer conductive layers. Additionally, some printed circuit boards include conductive vias that electrically couple two or more of the conductive layers together.
Demand for increased power density and miniaturization of power electronics system has created increased current carrying capacity and efficiency requirements for conductive vias.
At least some known methods of manufacturing printed circuit boards with high current carrying capacity conductive vias are less than optimal for certain applications. For example, at least some known methods plate or otherwise form conductive vias in a single plating process, in which every conductive via of the printed circuit board is formed. When used to form conductive vias having relatively thick sidewalls, the thickness of the outer conductive layers may be increased as a result of the plating process to the point where the printed circuit board is no longer compatible with existing miniaturization technology, such as fine pitch components. Additionally, when used to form conductive vias having different via sidewall thicknesses, known methods may result in relatively thin-wall vias having non-planar or irregular surface morphology, which may require additional processing (e.g., planarization) after via formation.
Accordingly, a need exists for printed circuit boards having thick-wall conductive vias and methods of manufacturing the same.